In ternary content addressable memory, not every bit in each row are compared in the searching or comparing process, so some time in one comparison, there are more than one row matching the input content, it is called multi-hit or match. In multi-hit case, one protocol was made to select the highest priority address. The logic of selecting the highest priority address is called priority encoding.
Assume we have {A0, A1, . . . An-1, An} hit signals from the corresponding addresses and define A0 has the highest priority and An has the lowest priority. Assume some of {A0, A1, . . . An-1, An} are logic “1” and all of the others are logic “0”, the priority encoding keep the highest priority “1” as “1” and convert all the other “1” into “0”. The logic operation of this transform:{A0, A1, . . . An-1, An}{h0, h1, . . . hn-1, hn}  (1)can logically be expressed as:h0=A0h1= A0*A1h2= A0* A1*A2. . .hn= A0*Ā1* A2 . . . An-1* An  (2)
Which means only when A0 to Ai-1, are all zero, hi=Ai, otherwise no matter Ai=0 or 1, hi=0.
After the priority encoding, the hit address with the highest priority will be encoded to the binary address.
If the entry N are large, say 1K to 128K or even 1M, the calculation of priority logic (2) will take long time if we use serial logic. So we come out the inventions which will be described in the following.